CPCI-IPC

CPCI 320C31 DSP Dual Industry Pack Carrier

Based around the Texas Instruments floating-point Digital Signal Processor TMS320C31 at 32 MHz
Dual Industry Pack carrier configuration, enabling a vast array of I/O possibilities and creating a cost-effective solution combining DSP and I/O
3U Compact PCI bus compatible
Front panel I/O
Virtually unlimited customization of input-output functions as well as hardware-accelerated signal processing
Adds high-speed, low latency I/O and deterministic control to a low-cost PC system solution

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CPCI-IPC

CPCI 320C31 DSP Dual Industry Pack Carrier

Product Details

Based around the Texas Instruments floating-point Digital Signal Processor TMS320C31 at 32 MHz
Dual Industry Pack carrier configuration, enabling a vast array of I/O possibilities and creating a cost-effective solution combining DSP and I/O
3U Compact PCI bus compatible
Front panel I/O
Virtually unlimited customization of input-output functions as well as hardware-accelerated signal processing
Adds high-speed, low latency I/O and deterministic control to a low-cost PC system solution

The board consists of private SDRAM and Flash memory attached to the 32 MHz, TMS320C31 floating-point DSP. An FPGA provides the timing and control. Peripherals include a serial port and connectors for IP mezzanine boards. Flash memory is available for downloading programs into non-volatile memory. A PCI bus connector provides the interface to the host computer.

Available Software Drivers and Software Tools:

- - C library DLLs
  - Linux drivers
  - Windows XP drivers
  - VxWorks drivers

Applications:

For applications requiring low-cost, high-density I/O or unique combinations, the CPCI-C31-2IP is the perfect solution. The Local DSP can be used to simply move data to and from the CPCI bus or provide preprocessing functions such as local PID controls, FFTs, digital filtering, etc.

The TMS320C31 DSP generation is supported by the TI eXpressDSP™ set of industry development tools, including a highly optimizing C/C++ Compiler, the Code Composer Studio™ Integrated Development Environment (IDE), JTAG-based emulation, real-time debugging, and the DSP/BIOS™ kernel.

Custom application software can be downloaded to the DSP via the CompactPCI bus.

TMS320C31 DSP Features:

- - 32-bit floating point DSP at 32 MHz
  - Single-cycle instruction execution
  - 2 Kbytes of internal RAM
  - DMA internal co-processor for concurrent I/O and CPU operation
  - Boot loader program built-in
  - 64 x 32 internal cache for data
  - 2 built-in timers
  - Two integer and floating point multipliers
  - Parallel multiply and arithmetic/logical operations on integer or floating-point numbers in a single cycle
  - Internal or external trigger support for A/D conversion synchronization tied to DSP operations
  - Two 32-bit timers which can also be configured for bit I/O

PCI Bus:

- - PLX 9056 33/66MHz 32-bit, PCI r2.2 compliant
  - Motorola PowerQUICC and generic 32-bit, 66MHz local bus modes
  - 3.3V I/O, 5V tolerant bus interfaces
  - PICMG 2.1 r2.0 hot swap
  - Zero wait state burst operation, with PCI bus bursts to 264 MB/sec and local bus bursts to 264 MB/sec
  - 2 DMA channels
  - Direct master data transfers
  - Direct slave data transfers

PCI Bus Control:

- - I2O r1.5 messaging unit
  - 8 mailboxes and 32 doorbell registers
  - PCI arbiter supports 7 external masters
  - Host mode reset/interrupt
  - Power management event generation support
  - Serial EEPROM interface
  - JTAG boundary scan

85C30 Specifications:

- - 2 serial channels
  - Up to 1 Mbps using a 16 MHz clock, synchronous mode
  - 5, 6, 7, or 8 bits per character
  - 1, 1 1/2, or 2 stop bits
  - Odd or even parity
  - X1, x16, x32, or x64 clock modes
  - Character-oriented synchronous capabilities
  - SDLC/HLDC capabilities
  - NRZ, NRZI, or FM encoding/decoding
  - Each serial channel has an independent baud rate generator
  - DPLL for clock recovery

Industry Pack Specifications:

- - Meets ANSI/VITA 4-1995
  - 8/32 MHz synchronous operation
  - Supports ID, 128-byte I/O, interrupt, & 8 Mbyte memory spaces
  - 2 interrupts per module
  - Two passive DMA channels are possible
  - Hardware self-timed per IP module
  - Triggered via system reset and software control
  - Jumper or software time-out function
  - 5, +/-12 volt reset-able fuse per IP
  - 8/16-bit data on 3U board, 32-bit on 6U board

Operating Environment:

- - Operating temperature:
    - Commercial: 0 to +70 ºC
    - Optional: -25 ºC to +80 ºC
  - Non-operating: -40 ºC to +85 ºC
  - Airflow requirement – 5 CFM
  - Humidity – 5 to 90% (non-condensing)
  - Altitude – 0 to 10,000 feet

Mechanical Environment:

- Size – 3U CPCI module (100mm x 160mm)
- Power – 1.5 watt
- Vibration – 0.5G, 20-2000 Hz random
- Shock – 20G, 11 msec, ½ sine
- Weight – TBD
- MTBF – >250,000 hours

CPCI-IPC 3U dual industry pack carrier with 320C31 DSP

Optional Accessories
CBL-HRS-HDR-50 50 pin HRS to header cable
TB-50-HDR 50 pin terminal block

Data Sheet – Link Here

User Manual – Link Here

Based around the Texas Instruments floating-point Digital Signal Processor TMS320C31 at 32 MHz
Dual Industry Pack carrier configuration, enabling a vast array of I/O possibilities and creating a cost-effective solution combining DSP and I/O
3U Compact PCI bus compatible
Front panel I/O
Virtually unlimited customization of input-output functions as well as hardware-accelerated signal processing
Adds high-speed, low latency I/O and deterministic control to a low-cost PC system solution

Mechanical Interface

Switched Mezzanine Card (XMC) Interface confirming to ANSI/VITA 42.0-2008 (Auxiliary Standard)

Standard single-width (149mm x 74mm)

Electrical Interface

PCI Express x4 Link (Base Specification 2.1) compliant interface conforming to ANSI/VITA 42.3-2006 (PCI Express Protocol Layer Standard)

PCI Express Switch

PI7C9X2G312GP (Pericom)

PCI Express to PCI Bridge

XIO2001 (Texas Instruments)

User configurable FPGA

TXMC639-10R: XC7K160T-2FBG676I (AMD)

TXMC639-11R: XC7K325T-2FBG676I (AMD)

SPI-Flash

MT25QL128 (Micron) 128 Mbit (contains TXMC639 FPGA BRD) or compatible; +3.3 V supply voltage

DDR3 RAM

2x MT41K256M16TW-107 (Micron) 256Meg x 32 bit

Board Configuration Controller

LCMXO2-7000HC (Lattice)

ADC

LTC2320 -16 (Analog Devices)

DAC

AD5547BRUZ (Analog Devices)

A/D Channels

TXMC639-10R: 8 Differential 16bit A/D Channels

TXMC639-11R: 16 Differential 16bit A/D Channels

Input Configuration per BCC Device:

Input Voltage Ranges:

Differental : ±20.57 V, ±10.28 V or ±5.14 V

(Single-Ended: ±10.28 V, ±5.14 V or ±2.57 V)

All analog inputs are connected via an impedance converter and a second operation amplifier for level adjustment and filtering to the differential ADC inputs.

The -3 dB limit of this input stage is at approx. 8MHz

D/A Channels

TXMC639-10R: 4 Single-Ended 16 Bit D/A Channels

TXMC639-11R: 8 Single-Ended 16 Bit D/A Channels

Output range configurable per D/A channel.
Simultaneous Conversion for all D/A Channels.

Maximum single-ended Output Voltage – Vout: ±10 V

Maximum Output Drive Current for each Output: 10 mA

Maximum Capacitive Load for each Output: 1000 pF

Typical Settling Time for a 10 mA / 1000 pF: < 1 µs

Digital Front I/O Channels

32 digital I/O Lines

Default configured as 32 ESD-protected TTL lines
16 I/O lines are configurable as 8 differential RS422 I/O lines with individual Termination enable.

Digital Rear I/O Channels

64 direct FPGA I/O lines to P14 Rear I/O connector

Can be used as single-ended or differential I/O
FPGA I/O Standard: LVCMOS25, LVTTL25 and LVDS25

4 MGT line to P16 Rear I/O connector

Each line consists of one differential RX and TX pair.
Transmission speeds of up to 3.125 Gb/s are possible.

Front I/O

Front I/O Samtec – ERF8_050_01_L_D_RA_L_TR

P14 Rear I/O

64 pin Mezzanine Connector (Molex 71436-2864 or compatible)

P16 Rear I/O

114 pin Mezzanine Connector (Samtec – ASP-105885-01)

Power Requirements ¹⁾

Depends on FPGA design

With TXMC639 Board Reference Design / without external load

	typical @ +12 V VPWR	typical @ +5 V VPWR
TXMC639-10R	1.1 A	2.5 A
TXMC639-11R	1.3 A	3.3 A

Temperature Range

Operating: – 40 °C to + 85 °C
Storage: – 55 °C to + 125 °C

MTBF ¹⁾

157 000 h to 161 000 h

Humidity

5% – 95% non-condensing

Weight

140 g

¹⁾ depends on variant, for further details see User Manual

TXMC639-10R

8x Analog In, 4x Analog Out, XC7K160T-2FBG676 Kintex™ 7 FPGA

AMD Kintex™ 7 FPGA (XC7K160T-2FBG676), 1GB DDR3, 8x Analog In, 4x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O

TXMC639-11R

16x Analog In, 8x Analog Out, XC7K325T-2FBG676 Kintex™ 7 FPGA

AMD Kintex™ 7 FPGA (XC7K325T-2FBG676), 1GB DDR3, 16x Analog In, 8x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O