CPCI-AD16

16 channels- 16 bit A/D CPCI With 320C31 DSP

  • TI floating-point Digital Signal Processor TMS320C31 at 32 MHz
  • Dual 16-bit A/D converters and two 8 to 1 multiplexers support 16 analog input channels
  • 3U high Compact PCI module
  • Front panel I/O connections
  • Differential or single-ended analog inputs
  • Instrumentation amplifier input support with software programmable gain
  • Optional input filter for high-frequency band elimination
  • Built-in DMA support for PCI and system high-speed data transfers

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CPCI-AD16

16 channels- 16 bit A/D CPCI With 320C31 DSP

  • TI floating-point Digital Signal Processor TMS320C31 at 32 MHz
  • Dual 16-bit A/D converters and two 8 to 1 multiplexers support 16 analog input channels
  • 3U high Compact PCI module
  • Front panel I/O connections
  • Differential or single-ended analog inputs
  • Instrumentation amplifier input support with software programmable gain
  • Optional input filter for high-frequency band elimination
  • Built-in DMA support for PCI and system high-speed data transfers

The 32 MHz floating point 32-bit DSP TMS320C31 provides input signal conditioning support. The DSP is supported by 512 Kbytes of zero wait state SRAM that provides temporary storage and workspace for DSP operations. 16 input channels are optionally filtered after software gain amplification instrumentation amplifiers provide differential or single-ended input buffering. A/D operations can be triggered internally or externally through the front panel. A PCIbus connector provides the interface to the host computer. This module can use external power source for reduced noise operation.

Available Software Drivers and Software Tools:

      • C library DLLs
      • Linux drivers
      • Windows XP drivers
      • VxWorks drivers
      • LabView

Applications:

The CPCI-AD16 module provides a 3U high-performance data acquisition subsystem. The Local DSP can be used to simply move data samples to the CPCI bus or can provide processing functions such as limit checking, FFTs, digital filtering, etc. Application software can be downloaded to the DSP via the CPCI interface.

Instrumentation amplifiers provide over-voltage protection, gain, and filtering on a per-channel basis. Internal scan and trigger clocks are derived from either the CPCI bus clock or the local DSP clock. Dual 32-bit timers can be programmed to pace the acquisition process. The CPCI-AD16 can also accept external scan and trigger signals from a front panel connector.

TMS320C31 DSP Features:

      • 32-bit floating point TMS320C31 DSP at 32 MHz
      • Single-cycle instruction execution
      • 2 Kbytes of internal RAM
      • DMA internal co-processor for concurrent I/O and CPU operation
      • Boot loader program built-in
      • 64 x 32 internal cache for data
      • 2 built-in timers
      • Two integer and floating point multipliers
      • Parallel multiply and arithmetic/logical operations on integer or floating-point numbers in a single cycle
      • Internal or external trigger support for A/D conversion synchronization tied to DSP operations
      • Two 32-bit timers which can also be configured for bit I/O

AD976A Specifications:

      • Fast 16-bit ADC
      • Successive approximation, switched capacitor architecture
      • 200 Ksamples/sec throughput – AD976A
      • Single 5 V supply operation
      • Input range: ±10 VDC
      • 100 mW max power dissipation
      • Choice of external or internal 2.5 VDC reference
      • High-speed parallel interface
      • On-chip clock

Filter Specifications:

      • 4th order analog low pass filters

Mechanical Environment:

      • Size – 3U CPCI module (100mm x 160mm)
      • Power – 1.5 watt
      • Vibration – 0.5G, 20-2000 Hz random
      • Shock – 20G, 11 msec, ½ sine
      • Weight – TBD
      • MTBF – >250,000 hours

PGA204 Instrumentation Amplifier Specifications:

      • Differential or single-ended input support; single-ended output referenced to Vref
      • ±10 VDC input range
      • Software programmable gain of 1, 10, 100, or 1000
      • Over-voltage protection to ±40 VDC
      • Low offset voltage: 50 µV max
      • Low offset voltage drift: 0.25 µV/°C
      • Low input bias current: 2nA max
      • Low quiescent current: 52 mA typical
      • Offset voltage, voltage drift, and quiescent current are laser-trimmed

PCI Bus Controller Features:

      • Uses the AMCC S5935 PCI controller
      • PCI 2.1 compliant master/slave
      • 132 Mbytes/sec transfer rate
      • Supports Windows NT service pack 2 & 3
      • PCI bus operation DC to 33 MHz
      • Four definable pass-through data channels
      • Two 32-byte internal FIFOs with DMA
      • Four mailbox registers with byte-level status and data strobe/interrupts
      • Direct PCI and add-on interrupt pins
      • Serial nvRAM interface or byte-wide nonvolatile memory interface

Operating Environment:

    • Operating temperature:
      • Commercial: 0 to +70 ºC
      • Optional: -25 ºC to +80 ºC
    • Non-operating: -40 ºC to +85 ºC
    • Airflow requirement – 5 CFM
    • Humidity – 5 to 90% (non-condensing)
    • Altitude – 0 to 10,000 feet

CPCI-AD16:
3U A/D converter with 320C6713B DSP


Optional Accessories:
CBL-SCSI-80:
80-pin SCSI to SCSI cable only


TB-80:
80-pin terminal block with cable

Data Sheet – Link Here

User Manual – Link Here

  • TI floating-point Digital Signal Processor TMS320C31 at 32 MHz
  • Dual 16-bit A/D converters and two 8 to 1 multiplexers support 16 analog input channels
  • 3U high Compact PCI module
  • Front panel I/O connections
  • Differential or single-ended analog inputs
  • Instrumentation amplifier input support with software programmable gain
  • Optional input filter for high-frequency band elimination
  • Built-in DMA support for PCI and system high-speed data transfers

 

Mechanical Interface

Switched Mezzanine Card (XMC) Interface confirming to ANSI/VITA 42.0-2008 (Auxiliary Standard)

Standard single-width (149mm x 74mm)

Electrical InterfacePCI Express x4 Link (Base Specification 2.1) compliant interface conforming to ANSI/VITA 42.3-2006 (PCI Express Protocol Layer Standard)
PCI Express SwitchPI7C9X2G312GP (Pericom)
PCI Express to PCI BridgeXIO2001 (Texas Instruments)
User configurable FPGA

TXMC639-10R: XC7K160T-2FBG676I (AMD)

TXMC639-11R: XC7K325T-2FBG676I (AMD)

SPI-FlashMT25QL128 (Micron) 128 Mbit (contains TXMC639 FPGA BRD) or compatible; +3.3 V supply voltage
DDR3 RAM2x MT41K256M16TW-107 (Micron) 256Meg x 32 bit
Board Configuration ControllerLCMXO2-7000HC (Lattice)
ADCLTC2320 -16 (Analog Devices)
DACAD5547BRUZ (Analog Devices)
A/D Channels

TXMC639-10R: 8 Differential 16bit A/D Channels

TXMC639-11R: 16 Differential 16bit A/D Channels

Input Configuration per BCC Device:

Input Voltage Ranges:

Differental : ±20.57 V, ±10.28 V or ±5.14 V

(Single-Ended: ±10.28 V, ±5.14 V or ±2.57 V)

All analog inputs are connected via an impedance converter and a second operation amplifier for level adjustment and filtering to the differential ADC inputs.

The -3 dB limit of this input stage is at approx. 8MHz

D/A Channels

TXMC639-10R: 4 Single-Ended 16 Bit D/A Channels

TXMC639-11R: 8 Single-Ended 16 Bit D/A Channels

Output range configurable per D/A channel.
Simultaneous Conversion for all D/A Channels.

Maximum single-ended Output Voltage – Vout: ±10 V

Maximum Output Drive Current for each Output: 10 mA

Maximum Capacitive Load for each Output: 1000 pF

Typical Settling Time for a 10 mA / 1000 pF: < 1 µs

Digital Front I/O Channels

32 digital I/O Lines

  • Default configured as 32 ESD-protected TTL lines
  • 16 I/O lines are configurable as 8 differential RS422 I/O lines with individual Termination enable.
Digital Rear I/O Channels

64 direct FPGA I/O lines to P14 Rear I/O connector

  • Can be used as single-ended or differential I/O
  • FPGA I/O Standard: LVCMOS25, LVTTL25 and LVDS25

4 MGT line to P16 Rear I/O connector

  • Each line consists of one differential RX and TX pair.
  • Transmission speeds of up to 3.125 Gb/s are possible.
Front I/OFront I/O Samtec – ERF8_050_01_L_D_RA_L_TR
P14 Rear I/O64 pin Mezzanine Connector (Molex 71436-2864 or compatible)
P16 Rear I/O114 pin Mezzanine Connector (Samtec – ASP-105885-01)
Power Requirements 1)

Depends on FPGA design

With TXMC639 Board Reference Design / without external load

 typical @ +12 V VPWRtypical @ +5 V VPWR
TXMC639-10R1.1 A2.5 A
TXMC639-11R1.3 A3.3 A
Temperature RangeOperating: – 40 °C to + 85 °C
Storage: – 55 °C to + 125 °C
MTBF 1)157 000 h to 161 000 h
Humidity5% – 95% non-condensing
Weight140 g

1) depends on variant, for further details see User Manual

 

TXMC639-10R

 

8x Analog In, 4x Analog Out, XC7K160T-2FBG676 Kintex™ 7 FPGA

AMD Kintex™ 7 FPGA (XC7K160T-2FBG676), 1GB DDR3, 8x Analog In, 4x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O

TXMC639-11R

 

16x Analog In, 8x Analog Out, XC7K325T-2FBG676 Kintex™ 7 FPGA

AMD Kintex™ 7 FPGA (XC7K325T-2FBG676), 1GB DDR3, 16x Analog In, 8x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O

SOFTWARE

Device Driver for Board Family with Reconfigurable FPGA

Data Sheet – Link-Here

User Manual – Link-Here

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