CPCI-AD320

CPCI 320C32 DSP, 32 Channel 16-Bit A/D with PMC slot

  • Based around the Texas Instruments floating-point Digital Signal Processor TMS320C32 at 60 MHz
  • 6U high Compact PCI module
  • 32 16-bit channels, 100 Ks/sec or optional 200 Ks/sec A/D
  • 8Kword sample buffer FIFO
  • One PMC expansion slot
  • External or internal sample gate logic
  • Differential instrumentation amplifier for each analog input
  • Programmable gain (1, 2, 4, 8 standard)
  • Front and rear panel I/O accessible
  • Rear panel I/O module connections
  • PXI compatible for multi-board triggering
  • External power supply input option

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CPCI-AD320

CPCI 320C32 DSP, 32 Channel 16-Bit A/D with PMC slot

  • Based around the Texas Instruments floating-point Digital Signal Processor TMS320C32 at 60 MHz
  • 6U high Compact PCI module
  • 32 16-bit channels, 100 Ks/sec or optional 200 Ks/sec A/D
  • 8Kword sample buffer FIFO
  • One PMC expansion slot
  • External or internal sample gate logic
  • Differential instrumentation amplifier for each analog input
  • Programmable gain (1, 2, 4, 8 standard)
  • Front and rear panel I/O accessible
  • Rear panel I/O module connections
  • PXI compatible for multi-board triggering
  • External power supply input option

The floating-point 32-bit, 60 MHz DSP TMS320C32 provides input signal conditioning support, backed by 512 Kbytes of zero wait-state SRAM for temporary storage and DSP operations, along with 4 Mbits of flash memory. The module features 32 input instrumentation amplifiers for differential input buffering and gain. A/D operations can be triggered either internally or externally via the front panel, with an 8Kword FIFO offering sample buffering. Additionally, a PMC expansion slot and a PCIbus connector provide expansion and interface capabilities to the host computer. For improved performance and reduced noise, the module supports an external power source.

  • TMS320C32 DSP FEATURES:
    • 32/40-bit floating point DSP at 60 MHz
    • 60 million floating-point operations (MFLOPS)
    • Two 256 x 32-bit single-cycle, dual access on-chip RAM blocks
    • One serial port
    • Two 32-bit timers
    • Two DMA internal co-processors
    • Boot loader program built-in
    • 64 x 32-bit on-board program cache
    • Internal or external trigger support for A/D conversion synchronization tied to DSP operations
  • PCI BUS CONTROLLER FEATURES:
    • The PLX PCI 9080 is PCI Version 2.1 compliant
    • Bus Master interface chip for adapters and embedded systems
    • Programmable local bus supports non-multiplexed 32-bit address/data, multiplexed 32- or 16-bit, and accesses of 32-, 16-, or 8-bit local bus devices
    • I2O compatible messaging unit
    • 3.3 or 5 volt PCI signaling, 5 volt core, low-power CMOS in 208-pin PQFP
    • Two independent programmable DMA channels for local bus memory to/from PCI host bus data transfers
    • Eight programmable FIFOs for zero wait state burst operation
    • PCI to/from local data transfers up to 133MB/sec
    • Local bus runs asynchronously to the PCI bus
    • Eight 32-bit mailbox and two 32-bit doorbell registers
    • Performs Big Endian/Little Endian conversion
  • AD976A SPECIFICATIONS:
    • Fast 16-bit ADC
    • Successive approximation, switched capacitor architecture
    • 200 Ksamples/sec throughput – AD976A
    • Single 5 V supply operation
    • Input range: ±10 VDC
    • 100 mW max power dissipation
    • Choice of external or internal 2.5 VDC reference
    • High speed parallel interface
    • On-chip clock
  • 85C30 SPECIFICATIONS:
    • 2 serial channels
    • Up to 1Mbps using a 16MHz clock, synchronous mode
    • 5, 6, 7, or 8 bits per character
    • 1, 1 1/2, or 2 stop bits
    • Odd or even parity
    • X1, x16, x32, or x64 clock modes
    • Character-oriented synchronous capabilities
    • SDLC/HLDC capabilities
    • NRZ, NRZI, or FM encoding/decoding
    • Each serial channel has independent baud rate generator
    • DPLL for clock recovery
  • INSTRUMENTATION AMPLIFIER SPECIFICATIONS:
    • Differential input support
    • ± 10VDC input range
    • Software programmable gain of 1, 2, 4, or 8
    • Over-voltage protection to ± 40 VDC
  • OPERATING ENVIRONMENT:
    • Operating temperature
      • Commercial: 0 to +70 ºC
      • Optional: -25 ºC to +80 ºC
    • Non-operating: -40 ºC to +85 ºC
    • Airflow requirement – 5 CFM
    • Humidity – 5 to 90% (non-cond)
    • Altitude – 0 to 10,000 feet
  • MECHANICAL ENVIRONMENT:
    • Size – 6U CPCI module
    • Dimensions: 233.35mm x 160mm
    • Power – 1.5 watt
    • Vibration – 0.5G, 20-2000 Hz random
    • Shock – 20G, 11 msec, ½ sine
    • Weight – TBD
    • MTBF – >250,000 hours

CPCI-AD320:
6U compact PCI with 32 16-bit A/D channels at 100Ksamples/sec and 320C32 DSP

Option-200:
with 200Ksamples/sec 32 16-bit A/D channels

Option-16:
16 channels of 16-bit A/D

Optional Accessories:
CBL-SCSI-50 50-pin terminal block with cable
TB-50 50-pin SCSI to SCSI terminal block

Data Sheet – Link Here

User Manual – Link Here

  • Based around the Texas Instruments floating-point Digital Signal Processor TMS320C32 at 60 MHz
  • 6U high Compact PCI module
  • 32 16-bit channels, 100 Ks/sec or optional 200 Ks/sec A/D
  • 8Kword sample buffer FIFO
  • One PMC expansion slot
  • External or internal sample gate logic
  • Differential instrumentation amplifier for each analog input
  • Programmable gain (1, 2, 4, 8 standard)
  • Front and rear panel I/O accessible
  • Rear panel I/O module connections
  • PXI compatible for multi-board triggering
  • External power supply input option

 

Mechanical Interface

Switched Mezzanine Card (XMC) Interface confirming to ANSI/VITA 42.0-2008 (Auxiliary Standard)

Standard single-width (149mm x 74mm)

Electrical InterfacePCI Express x4 Link (Base Specification 2.1) compliant interface conforming to ANSI/VITA 42.3-2006 (PCI Express Protocol Layer Standard)
PCI Express SwitchPI7C9X2G312GP (Pericom)
PCI Express to PCI BridgeXIO2001 (Texas Instruments)
User configurable FPGA

TXMC639-10R: XC7K160T-2FBG676I (AMD)

TXMC639-11R: XC7K325T-2FBG676I (AMD)

SPI-FlashMT25QL128 (Micron) 128 Mbit (contains TXMC639 FPGA BRD) or compatible; +3.3 V supply voltage
DDR3 RAM2x MT41K256M16TW-107 (Micron) 256Meg x 32 bit
Board Configuration ControllerLCMXO2-7000HC (Lattice)
ADCLTC2320 -16 (Analog Devices)
DACAD5547BRUZ (Analog Devices)
A/D Channels

TXMC639-10R: 8 Differential 16bit A/D Channels

TXMC639-11R: 16 Differential 16bit A/D Channels

Input Configuration per BCC Device:

Input Voltage Ranges:

Differental : ±20.57 V, ±10.28 V or ±5.14 V

(Single-Ended: ±10.28 V, ±5.14 V or ±2.57 V)

All analog inputs are connected via an impedance converter and a second operation amplifier for level adjustment and filtering to the differential ADC inputs.

The -3 dB limit of this input stage is at approx. 8MHz

D/A Channels

TXMC639-10R: 4 Single-Ended 16 Bit D/A Channels

TXMC639-11R: 8 Single-Ended 16 Bit D/A Channels

Output range configurable per D/A channel.
Simultaneous Conversion for all D/A Channels.

Maximum single-ended Output Voltage – Vout: ±10 V

Maximum Output Drive Current for each Output: 10 mA

Maximum Capacitive Load for each Output: 1000 pF

Typical Settling Time for a 10 mA / 1000 pF: < 1 µs

Digital Front I/O Channels

32 digital I/O Lines

  • Default configured as 32 ESD-protected TTL lines
  • 16 I/O lines are configurable as 8 differential RS422 I/O lines with individual Termination enable.
Digital Rear I/O Channels

64 direct FPGA I/O lines to P14 Rear I/O connector

  • Can be used as single-ended or differential I/O
  • FPGA I/O Standard: LVCMOS25, LVTTL25 and LVDS25

4 MGT line to P16 Rear I/O connector

  • Each line consists of one differential RX and TX pair.
  • Transmission speeds of up to 3.125 Gb/s are possible.
Front I/OFront I/O Samtec – ERF8_050_01_L_D_RA_L_TR
P14 Rear I/O64 pin Mezzanine Connector (Molex 71436-2864 or compatible)
P16 Rear I/O114 pin Mezzanine Connector (Samtec – ASP-105885-01)
Power Requirements 1)

Depends on FPGA design

With TXMC639 Board Reference Design / without external load

 typical @ +12 V VPWRtypical @ +5 V VPWR
TXMC639-10R1.1 A2.5 A
TXMC639-11R1.3 A3.3 A
Temperature RangeOperating: – 40 °C to + 85 °C
Storage: – 55 °C to + 125 °C
MTBF 1)157 000 h to 161 000 h
Humidity5% – 95% non-condensing
Weight140 g

1) depends on variant, for further details see User Manual

 

TXMC639-10R

 

8x Analog In, 4x Analog Out, XC7K160T-2FBG676 Kintex™ 7 FPGA

AMD Kintex™ 7 FPGA (XC7K160T-2FBG676), 1GB DDR3, 8x Analog In, 4x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O

TXMC639-11R

 

16x Analog In, 8x Analog Out, XC7K325T-2FBG676 Kintex™ 7 FPGA

AMD Kintex™ 7 FPGA (XC7K325T-2FBG676), 1GB DDR3, 16x Analog In, 8x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O

SOFTWARE

Device Driver for Board Family with Reconfigurable FPGA

Data Sheet – Link-Here

User Manual – Link-Here

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