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  • Single-wide Industry Pack board
  • Altera FPGA 10K50E, 10K100E, or 10K130E
  • Up to 24 LVDS driver/receiver pairs (SN65MLVD204AD) or 48 TTL I/O lines
  • Each line can be separately selected as input or output in TTL mode
  • Programmable in groups of 4 I/O
  • 100Ω terminating resistor or no resistor for LVDS I/O, resistor software selectable using MAX335 switch
  • Up to 512K x 8 x 2 dual-ported SRAM
  • EPM7160 timing device for IP bus, DPR bus, and FLEX device access
  • Single-wide Industry Pack board
  • Altera FPGA 10K50E, 10K100E, or 10K130E
  • Up to 24 RS485 or RS422 driver/receiver (MAX1484) or TTL input/output lines
  • Each line can be separately selected as input or output
  • Programmable in groups of 4 I/O
  • 100Ω terminating resistor or no resistor for RS485/RS422 I/O, resistor software selectable using MAX335 switch
  • Up to 512K x 8 x 2 dual-ported SRAM
  • EPM7160 timing device for IP bus, DPR bus, and FLEX device access
  • 1 controller of dual redundant (A/B channel) 1553 communications
  • Programmable bus controller, remote terminal, or monitor terminal modes
  • MIL-STD-1553 A and B compliant, Notice 2 RT
  • Long or short stub support
  • Low power consumption
  • On-chip transceivers
  • On-board isolation transformers
  • Single +5 VDC supply
  • EEPROM (32 bytes) for identification
  • Simultaneous RT/M mode
  • 16-bit AD7671 A/D converter
  • Acquisition time of ≤2μsec (500Ksps)
  • Multiplexed 48 single-ended or 24 differential channels
  • Fault and over-voltage protected analog input (-40 VDC to +55 VDC)
  • Software programmable single-ended or differential input and gain for each channel
  • Input ranges: ±10VDC, ±5VDC, ±2.5VDC, ±1.25VDC via software programmable gain amplifier
  • A/D jumper selectable gain (1-2-4-8)
  • Internal sequencer with channel list for selected channel acquisition
  • On-board input switches for offset or gain calibration
  • 16-bit AD7656 A/D converter module
  • 8 A/D modules each with 6 independent A/D channels for a total of 48 single-ended A/D’s
  • Acquisition time of 250Ksps
  • Input ranges: ±10VDC, ±5VDC (software selectable or pin selectable)
  • 64Kx16 FIFO enables burst mode or continuous sampling
  • Sampling clock selected from one of the following sources:
    • Internal divider (TCLK0)
    • IPSTROBE
    • External clock
    • Host
  • Resolution: 16-bit
  • Settling Time: ≤20μsec (50Kcps)
  • Output Channels: 3 D/A’s each with 16 channels output
  • Output Voltage Range: Nominal -10VDC to +10VDC
  • Output Spans: Multiple output spans available
  • Temperature Monitoring: Temperature monitoring function
  • System Calibration: System calibration function allowing user-programmable offset and gain for each channel
  • Channel Grouping: Channel grouping and addressing features; the D/A converter is divided into 2 groups of 8 D/A’s adjusted independently by offset D/A
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