- Based around the Texas Instruments floating-point Digital Signal Processor TMS320C31 at 32 MHz
- Quad 16 MHz SCC85230 serial controller with 8 serial channels, with optional mezzanine-based I/O or RS232C/RS422/RS485 drivers
- Compact PCI bus compatible
- Front panel for mezzanine I/O
- The SCC is multi-protocol, supporting synchronous, asynchronous, Bisync, Xon/Xoff, HDLC, or SDLC communication protocols
- Adds high-speed, low latency I/O and deterministic control to a low-cost PC system solution
CPCI-C31-ISC8
CPCI 320C31 DSP Octal Serial Controller
- Based around the Texas Instruments floating-point Digital Signal Processor TMS320C31 at 32 MHz
- Quad 16 MHz SCC85230 serial controller with 8 serial channels, with optional mezzanine-based I/O or RS232C/RS422/RS485 drivers
- Compact PCI bus compatible
- Front panel for mezzanine I/O
- The SCC is multi-protocol, supporting synchronous, asynchronous, Bisync, Xon/Xoff, HDLC, or SDLC communication protocols
- Adds high-speed, low latency I/O and deterministic control to a low-cost PC system solution
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The board consists of private SDRAM and Flash memory attached to the TMS320C31 DSP at 32 MHz. An FPGA provides the timing and control. Peripherals include a serial port and connectors for IP mezzanine boards. Flash memory is available for downloading programs into non-volatile memory. A PCI bus connector provides the interface to the host computer. The mezzanine connector area can be used for RS232, RS422, and/or RS485 drivers or other custom serial I/O configurations.
Available Software Drivers and Software Tools:
- C library DLLs
- Linux drivers
- Windows XP drivers
- VxWorks drivers
The TMS320C31 DSP generation is supported by the TI eXpressDSP™ set of industry development tools, including a highly optimizing C/C++ Compiler, the Code Composer Studio™ Integrated Development Environment (IDE), JTAG-based emulation, real-time debugging, and the DSP/BIOS™ kernel.
Applications:
For applications requiring low-cost, high-density I/O or unique combinations, the CPCI-C31-ISC8 is the perfect solution. The Local DSP can be used to simply move data to and from the CPCI bus or provide multi-protocol support up to the application level, etc. Custom application software can be downloaded to the DSP via the CompactPCI bus.
TMS320C31 DSP Features:
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- 32-bit floating point DSP at 32 MHz
- Single-cycle instruction execution
- 2 Kbytes of internal RAM
- DMA internal co-processor for concurrent I/O and CPU operation
- Boot loader program built-in
- 64 x 32 internal cache for data
- 2 built-in timers
- Two integer and floating point multipliers
- Parallel multiply and arithmetic/logical operations on integer or floating-point numbers in a single cycle
- Internal or external trigger support for A/D conversion synchronization tied to DSP operations
- Two 32-bit timers which can also be configured for bit I/O
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PCI Bus Controller Features:
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- Uses the AMCC S5935 PCI controller
- PCI 2.1 compliant master/slave
- 132 Mbytes/sec transfer rate
- Supports Windows NT service pack 2 & 3
- PCI bus operation DC to 33 MHz
- Four definable pass-through data channels
- Two 32-byte internal FIFOs with DMA
- Four mailbox registers with byte-level status and data strobe/interrupts
- Direct PCI and add-on interrupt pins
- Serial nvRAM interface or byte-wide nonvolatile memory interface
- Performs Big Endian/Little Endian conversion
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SCC/85230 Features:
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- 16 MHz clock
- Programmable synchronous and isosynchronous data rates
- Asynchronous capabilities
- 5, 6, 7, or 8 bits/character
- 1, 1.5, or 2 stop bits
- Odd or even parity
- 1x, 16x, 32x, or 64x clock modes
- Direct byte-oriented synchronous support
- Direct SDLC/HDLC support
- Receiver/transmitter FIFO
- DPLL for clock recovery
- Baud rate generator for each channel
- NRZ, NRZI, or FM encoding/decoding with Manchester coding support
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Operating Environment:
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- Operating temperature:
- Commercial: 0 to +70 ºC
- Optional: -25 ºC to +80 ºC
- Non-operating: -40 ºC to +85 ºC
- Airflow requirement – 5 CFM
- Humidity – 5 to 90% (non-condensing)
- Altitude – 0 to 10,000 feet
- Operating temperature:
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Mechanical Environment:
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- Size – 3U CPCI module (100mm x 160mm)
- Power – 1.5 watt
- Vibration – 0.5G, 20-2000 Hz random
- Shock – 20G, 11 msec, ½ sine
- Weight – TBD
- MTBF – >250,000 hours
CPCI-C31-ISC8
3U 320C31 DSP with 8 serial communication
Mezz-ICC8
channels
Optional Accessories:
CBL-HRS-HDR-50
50 pin HRS to header cable
TB-50-HDR
50 pin terminal block
- Based around the Texas Instruments floating-point Digital Signal Processor TMS320C31 at 32 MHz
- Quad 16 MHz SCC85230 serial controller with 8 serial channels, with optional mezzanine-based I/O or RS232C/RS422/RS485 drivers
- Compact PCI bus compatible
- Front panel for mezzanine I/O
- The SCC is multi-protocol, supporting synchronous, asynchronous, Bisync, Xon/Xoff, HDLC, or SDLC communication protocols
- Adds high-speed, low latency I/O and deterministic control to a low-cost PC system solution
Mechanical Interface | Switched Mezzanine Card (XMC) Interface confirming to ANSI/VITA 42.0-2008 (Auxiliary Standard) Standard single-width (149mm x 74mm) | |||||||||
Electrical Interface | PCI Express x4 Link (Base Specification 2.1) compliant interface conforming to ANSI/VITA 42.3-2006 (PCI Express Protocol Layer Standard) | |||||||||
PCI Express Switch | PI7C9X2G312GP (Pericom) | |||||||||
PCI Express to PCI Bridge | XIO2001 (Texas Instruments) | |||||||||
User configurable FPGA | TXMC639-10R: XC7K160T-2FBG676I (AMD) TXMC639-11R: XC7K325T-2FBG676I (AMD) | |||||||||
SPI-Flash | MT25QL128 (Micron) 128 Mbit (contains TXMC639 FPGA BRD) or compatible; +3.3 V supply voltage | |||||||||
DDR3 RAM | 2x MT41K256M16TW-107 (Micron) 256Meg x 32 bit | |||||||||
Board Configuration Controller | LCMXO2-7000HC (Lattice) | |||||||||
ADC | LTC2320 -16 (Analog Devices) | |||||||||
DAC | AD5547BRUZ (Analog Devices) | |||||||||
A/D Channels | TXMC639-10R: 8 Differential 16bit A/D Channels TXMC639-11R: 16 Differential 16bit A/D Channels Input Configuration per BCC Device: Input Voltage Ranges: Differental : ±20.57 V, ±10.28 V or ±5.14 V (Single-Ended: ±10.28 V, ±5.14 V or ±2.57 V) All analog inputs are connected via an impedance converter and a second operation amplifier for level adjustment and filtering to the differential ADC inputs. The -3 dB limit of this input stage is at approx. 8MHz | |||||||||
D/A Channels | TXMC639-10R: 4 Single-Ended 16 Bit D/A Channels TXMC639-11R: 8 Single-Ended 16 Bit D/A Channels Output range configurable per D/A channel. Maximum single-ended Output Voltage – Vout: ±10 V Maximum Output Drive Current for each Output: 10 mA Maximum Capacitive Load for each Output: 1000 pF Typical Settling Time for a 10 mA / 1000 pF: < 1 µs | |||||||||
Digital Front I/O Channels | 32 digital I/O Lines
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Digital Rear I/O Channels | 64 direct FPGA I/O lines to P14 Rear I/O connector
4 MGT line to P16 Rear I/O connector
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Front I/O | Front I/O Samtec – ERF8_050_01_L_D_RA_L_TR | |||||||||
P14 Rear I/O | 64 pin Mezzanine Connector (Molex 71436-2864 or compatible) | |||||||||
P16 Rear I/O | 114 pin Mezzanine Connector (Samtec – ASP-105885-01) | |||||||||
Power Requirements 1) | Depends on FPGA design With TXMC639 Board Reference Design / without external load
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Temperature Range | Operating: – 40 °C to + 85 °C Storage: – 55 °C to + 125 °C | |||||||||
MTBF 1) | 157 000 h to 161 000 h | |||||||||
Humidity | 5% – 95% non-condensing | |||||||||
Weight | 140 g |
1) depends on variant, for further details see User Manual
TXMC639-10R
| 8x Analog In, 4x Analog Out, XC7K160T-2FBG676 Kintex™ 7 FPGA AMD Kintex™ 7 FPGA (XC7K160T-2FBG676), 1GB DDR3, 8x Analog In, 4x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O |
TXMC639-11R
| 16x Analog In, 8x Analog Out, XC7K325T-2FBG676 Kintex™ 7 FPGA AMD Kintex™ 7 FPGA (XC7K325T-2FBG676), 1GB DDR3, 16x Analog In, 8x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O |