Available Software Drivers and Software Tools:

• C library DLLs
• Linux drivers
• Windows XP drivers
• VxWorks drivers
• LabView

The TMS320C67x DSP generation is supported by the TI eXpressDSP™ set of industry development tools, including a highly optimizing C/C++ Compiler, the Code Composer Studio™ Integrated Development Environment (IDE), JTAG-based emulation, real-time debugging, and the DSP/BIOS™ kernel.

Applications:
For application requiring low cost, high density I/O or unique combinations, the CPCI-6713B-2IP is the perfect solution. The Local DSP can be used to simply move data to and from the CPCI bus or provide pre processing functions such as local PID controls, FFT’s, digital filtering, etc. Custom application software can be downloaded to the DSP via the CompactPCI bus.

TMS320C6713 DSP Features:

• • • TMS320C6713B™ DSP @ 300 MHz
    • 32/64 bit data word
    • 8 32-bit instructions/cycle
    • Up to 2400 MIPS/MFLOPS
    • Advanced very long instruction word DSP core with 8 independent functional units:
      • 2 ALUs (fixed point)
      • 4 ALUs (floating/fixed point)
      • 2 multipliers (floating/fixed point)
    • L1/L2 memory architecture:
      • 4K byte L1P program cache
      • 4K byte L1D data cache (2-way)
      • 256K byte L2 memory total with 64KByte L2 Unified Cache/Mapped RAM
      • 192K-Byte Additional L2 Mapped RAM
    • Load-store architecture with 32 32-bit general-purpose registers
    • Native instructions for IEEE 754 single and double precision operations
    • 32-bit external memory interface with a glueless interface to SRAM, EPROM, Flash, SBSRAM, and SDRAM with 512 Mbyte total addressable external memory space
    • Dual 32-bit general-purpose timers
    • 16 channel EDMA ‘Enhanced DMA’
    • Two inter-integrated circuit bus (I2C Bus)
    • 16-bit Host-Port Interface (HPI)
    • IEEE-1149.1 (JTAG) boundary scan compatible

Industry Pack Specifications:

• • • Dual Industry Pack Sites
    • Meets ANSI Vita 4
    • 8/32 MHz operation
    • Support ID, I/O, Int. & mem spaces
    • 2 Interrupts
    • Hardware self-timed per IP module
    • Triggered via system reset and software control
    • Jumper or software time-out function
    • 5, +/-12 volt reset-able fuse per IP
    • 8/16 bit data

PCI Bus:

• • • PLX 9056 33/66MHz 32-bit, PCI r2.2 compliant
    • Motorola PowerQUICC and generic 32-bit, 66MHz local bus modes
    • 3.3V I/O, 5V tolerant bus interfaces
    • PICMG 2.1 r2.0 hot swap
    • Zero wait state burst operation, with PCI bus bursts to 264 MB/sec and local bus bursts to 264 MB/sec
    • 2 DMA channels
    • Direct master data transfers
    • Direct slave data transfers

PCI Bus Control:

• • • I2O r1.5 messaging unit
    • 8 mailboxes and 32 doorbell registers
    • PCI arbiter supports 7 external masters
    • Host mode reset/interrupt
    • Power management event generation support
    • Serial EEPROM interface
    • JTAG boundary scan

Operating Environment:

• • • Operating temperature: Commercial: 0 to +70 ºC, Optional: -25 ºC to +80 ºC
    • Non-operating temperature: -40 ºC to +85 ºC
    • Airflow requirement – 5 CFM
    • Humidity – 5 to 90% (non-condensing)
    • Altitude – 0 to 10,000 feet

Mechanical & Environmental:

• • Size – 3U CPCI module 100mm x 160mm
  • Single wide PMC 2.92” X 5.87”
  • Power – 1.5 watt
  • Front panel I/O on carrier and mezzanine IP cards
  • Vibration – 0.5G, 20-2000 Hz random
  • Shock – 20G, 11 msec, ½ sine
  • Weight – TBD
  • MTBF – >250,000 hours