XMC-8AD16-200

XMC 32 Channels A/D 16 Bits 200KHZ

  • Form Factor: XMC module, single-wide PMC size (74mm x 149mm)
  • Analog-to-Digital Conversion: 32 channels of 16-bit A/D conversion, simultaneously sampled
  • Throughput: Up to 200 KSPS per channel
  • Input Configuration: True differential inputs with instrumentation amplifiers per channel
  • Software Programmable Gain: 1, 2, 4, 8
  • Analog Input Ranges: Bipolar ±1.25 V, ±2.5 V, ±5 V, ±10 V
  • Anti-alias Filtering: Programmable 2nd order analog filter
  • Over-sampling and Digital Filtering: Supported
  • Memory: 32 Mbits (2M x 16) dual-ported SRAM
  • DMA Capabilities: Available for efficient data transfer

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XMC-8AD16-200

XMC 32 Channels A/D 16 Bits 200KHZ

  • Form Factor: XMC module, single-wide PMC size (74mm x 149mm)
  • Analog-to-Digital Conversion: 32 channels of 16-bit A/D conversion, simultaneously sampled
  • Throughput: Up to 200 KSPS per channel
  • Input Configuration: True differential inputs with instrumentation amplifiers per channel
  • Software Programmable Gain: 1, 2, 4, 8
  • Analog Input Ranges: Bipolar ±1.25 V, ±2.5 V, ±5 V, ±10 V
  • Anti-alias Filtering: Programmable 2nd order analog filter
  • Over-sampling and Digital Filtering: Supported
  • Memory: 32 Mbits (2M x 16) dual-ported SRAM
  • DMA Capabilities: Available for efficient data transfer

The XMC-32AD16-200 simultaneously sampled A/D offers a mix of up to 32 differential analog input channels. All channels feature programmable gain of 1, 2, 4, or 8 and can be programmed to handle analog input with either a single-ended or differential configuration. The acquisition can be started by the host or by an on-board sequencer that uses a channel list to specify which channel to acquire. A local 2M8Kx16 dual-ported SRAM stores the acquisition data. Memory pointers can be selected to limit the number of scans gathered, as well as control interrupt generation. The 16-bit A/D converters can provide a global acquisition and conversion time of ≤5µsec per sample per channel. The board offers a programmable digital filter with a ±5 V range, where the −3 dB frequency is typically 15 kHz, and in the ±10 V range, the −3 dB frequency is typically 23 kHz.

ADC Specifications

  • 16-bit, charge redistribution SAR A/D converter
  • Hardware factory-calibrated and tested for SNR and THD
  • Gain, offset, and linearity are factory-calibrated
  • Throughput: 200 KSPS per channel
  • INL: ±0.5 LSB Max with no missing codes
  • SNR: 95.5 dB, THD: −107 dB
  • Analog input voltage ranges: bipolar ±1.25 V, ±2.5 V, ±5 V, ±10 V
  • No pipeline delay

Instrumentation Amplifier Specifications

  • Differential input support
  • ±10VDC input range
  • Software programmable gain of 1, 2, 4, 8
  • Over-voltage protection to ±40 VDC
  • Differential input with 2-wire interface (Hi, Low)

Multi-Board Synchronization

  • Multiple board synchronization via software control for clocks and triggers
  • External trigger / Internal trigger options

XMC Bus Interface

  • XMC Bus Interface using PLX 8311

I/O Panel Connectors

  • Front Panel 68-pin SCSI Connector

Operating Environment

  • Operating temperature: Commercial 0 to +70 ºC, Optional -40 ºC to +85 ºC
  • Non-operating temperature: -45 ºC to +100 ºC
  • Airflow requirement: 5 CFM
  • Humidity: 5 to 90% (non-cond.)
  • Altitude: up to 10,000 feet

Mechanical Environment

  • Size: Single Wide PMC module, 74mm x 149mm
  • Power consumption: 1.5 watts
  • Vibration resistance: 0.5G (20-2000 Hz)
  • Shock resistance: 20G (11 msec, ½ sine)
  • Weight: 3 ounces
  • MTBF: >250,000 hours

Ordering InformationCommercial Temperature: 0°C to +70°C

  • Part Number: XMC-16AD16-200 – 16 Channels 16 Bits, 200KSP
  • Part Number: XMC-32AD16-200 – 32 Channels 16 Bits, 200KSP

Extended Temperature: -40°C to +85°C

  • Part Number: XMC-16AD16-200-I – 16 Channels 16 Bits, 200KSP
  • Part Number: XMC-32AD16-200-I – 32 Channels 16 Bits, 200KSP
  • Form Factor: XMC module, single-wide PMC size (74mm x 149mm)
  • Analog-to-Digital Conversion: 32 channels of 16-bit A/D conversion, simultaneously sampled
  • Throughput: Up to 200 KSPS per channel
  • Input Configuration: True differential inputs with instrumentation amplifiers per channel
  • Software Programmable Gain: 1, 2, 4, 8
  • Analog Input Ranges: Bipolar ±1.25 V, ±2.5 V, ±5 V, ±10 V
  • Anti-alias Filtering: Programmable 2nd order analog filter
  • Over-sampling and Digital Filtering: Supported
  • Memory: 32 Mbits (2M x 16) dual-ported SRAM
  • DMA Capabilities: Available for efficient data transfer

 

Mechanical Interface

Switched Mezzanine Card (XMC) Interface confirming to ANSI/VITA 42.0-2008 (Auxiliary Standard)

Standard single-width (149mm x 74mm)

Electrical InterfacePCI Express x4 Link (Base Specification 2.1) compliant interface conforming to ANSI/VITA 42.3-2006 (PCI Express Protocol Layer Standard)
PCI Express SwitchPI7C9X2G312GP (Pericom)
PCI Express to PCI BridgeXIO2001 (Texas Instruments)
User configurable FPGA

TXMC639-10R: XC7K160T-2FBG676I (AMD)

TXMC639-11R: XC7K325T-2FBG676I (AMD)

SPI-FlashMT25QL128 (Micron) 128 Mbit (contains TXMC639 FPGA BRD) or compatible; +3.3 V supply voltage
DDR3 RAM2x MT41K256M16TW-107 (Micron) 256Meg x 32 bit
Board Configuration ControllerLCMXO2-7000HC (Lattice)
ADCLTC2320 -16 (Analog Devices)
DACAD5547BRUZ (Analog Devices)
A/D Channels

TXMC639-10R: 8 Differential 16bit A/D Channels

TXMC639-11R: 16 Differential 16bit A/D Channels

Input Configuration per BCC Device:

Input Voltage Ranges:

Differental : ±20.57 V, ±10.28 V or ±5.14 V

(Single-Ended: ±10.28 V, ±5.14 V or ±2.57 V)

All analog inputs are connected via an impedance converter and a second operation amplifier for level adjustment and filtering to the differential ADC inputs.

The -3 dB limit of this input stage is at approx. 8MHz

D/A Channels

TXMC639-10R: 4 Single-Ended 16 Bit D/A Channels

TXMC639-11R: 8 Single-Ended 16 Bit D/A Channels

Output range configurable per D/A channel.
Simultaneous Conversion for all D/A Channels.

Maximum single-ended Output Voltage – Vout: ±10 V

Maximum Output Drive Current for each Output: 10 mA

Maximum Capacitive Load for each Output: 1000 pF

Typical Settling Time for a 10 mA / 1000 pF: < 1 µs

Digital Front I/O Channels

32 digital I/O Lines

  • Default configured as 32 ESD-protected TTL lines
  • 16 I/O lines are configurable as 8 differential RS422 I/O lines with individual Termination enable.
Digital Rear I/O Channels

64 direct FPGA I/O lines to P14 Rear I/O connector

  • Can be used as single-ended or differential I/O
  • FPGA I/O Standard: LVCMOS25, LVTTL25 and LVDS25

4 MGT line to P16 Rear I/O connector

  • Each line consists of one differential RX and TX pair.
  • Transmission speeds of up to 3.125 Gb/s are possible.
Front I/OFront I/O Samtec – ERF8_050_01_L_D_RA_L_TR
P14 Rear I/O64 pin Mezzanine Connector (Molex 71436-2864 or compatible)
P16 Rear I/O114 pin Mezzanine Connector (Samtec – ASP-105885-01)
Power Requirements 1)

Depends on FPGA design

With TXMC639 Board Reference Design / without external load

 typical @ +12 V VPWRtypical @ +5 V VPWR
TXMC639-10R1.1 A2.5 A
TXMC639-11R1.3 A3.3 A
Temperature RangeOperating: – 40 °C to + 85 °C
Storage: – 55 °C to + 125 °C
MTBF 1)157 000 h to 161 000 h
Humidity5% – 95% non-condensing
Weight140 g

1) depends on variant, for further details see User Manual

 

TXMC639-10R

 

8x Analog In, 4x Analog Out, XC7K160T-2FBG676 Kintex™ 7 FPGA

AMD Kintex™ 7 FPGA (XC7K160T-2FBG676), 1GB DDR3, 8x Analog In, 4x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O

TXMC639-11R

 

16x Analog In, 8x Analog Out, XC7K325T-2FBG676 Kintex™ 7 FPGA

AMD Kintex™ 7 FPGA (XC7K325T-2FBG676), 1GB DDR3, 16x Analog In, 8x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O

SOFTWARE

Device Driver for Board Family with Reconfigurable FPGA

Data Sheet – Link-Here

User Manual – Link-Here

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