- Form Factor: XMC single-width (74mm x 149mm)
- DACs: Software Programmable 2µs DACs, up to 32 channels, 16-bit resolution
- Settling Time: 2µS settling time, 0-5V range
- Output Drive: Up to 30mA output drive
- Memory: 1M words x 32 bits dynamically allocatable among channels
- Throughput: 500K samples/second throughput
- Digital I/O: 4-user digital I/O (TTL levels, outputs: 48mA sinking, 12mA sourcing)
- Optional Feature: Optional A/D for reading back
XMC-SoftDAC-32F
XMC with Software Programmable 2µs DACs Up to 32 Channel 16-bit DACs with Programmable Outputs
- Form Factor: XMC single-width (74mm x 149mm)
- DACs: Software Programmable 2µs DACs, up to 32 channels, 16-bit resolution
- Settling Time: 2µS settling time, 0-5V range
- Output Drive: Up to 30mA output drive
- Memory: 1M words x 32 bits dynamically allocatable among channels
- Throughput: 500K samples/second throughput
- Digital I/O: 4-user digital I/O (TTL levels, outputs: 48mA sinking, 12mA sourcing)
- Optional Feature: Optional A/D for reading back
Share this product
LinkedIn
XMC-SoftDAC-32F
XMC with Software Programmable 2µs DACs Up to 32 Channel 16-bit DACs with Programmable Outputs
The XMC-SoftDAC-32F allows the output of waveforms at a continuous compounded rate of 500k samples per second. A state machine extracts the output data from a 1M word FIFO buffer. The buffer space is only used by the channels updated by the state machine (i.e., if only 16 channels use the FIFO, then each channel has about 64k samples). Writing to the FIFO supports DMA access, which allows high speed transfer rates to the board. The onboard state machine allows recycling the FIFO data to produce a continuous recurring waveform with no processor intervention once the data has been input to the FIFO. Additional information in the data words contains the destination channel as well as range and gain instructions for the state machine. These instructions allow smooth changes from one set of data to the next. This scheme also supports faster refresh rates on some channels compared to others.
Features
- 2μS settling time, 0-5V range
- Six programmable output ranges per channel
- Up to 30mA output drive
- Output Specification:
- 16 bits settling time: 700ns (typ)
- Low offset: 125μV (typ)
- Offset drift: 0.35μV/°C (typ)
- Unipolar mode: 0V to 5V, 0V to 10V
- Bipolar mode: ±5V, ±10V, ±2.5V, –2.5V to 7.5V, ±10 mA continuous, ±30 mA max
- 1LSB max DNL and INL over the Industrial Temperature Range
- 1M words x 32 bits dynamically allocatable among channels
- 500K samples/second throughput
- Power-on reset to 0V
- Flash RAM for configuration file
- Two-stage buffers
- Global output buffer with internal or external triggering
- 4-user digital I/O (TTL levels, outputs: 48mA sinking, 12mA sourcing)
- Optional A/D for reading back
- Internal ±15V
Applications
- Process Control and Industrial Automation
- Precision Instrumentation
- Direct Digital Waveform Generation
- Software-Controlled Gain Adjustment
XMC Interface
- PLX 8311-
- 32 Bit, 33/66 MHz
- DMA for maximum throughput from the host
Available Software Drivers
- C library dll’s
- Linux drivers
- Windows drivers
- VxWorks drivers
Mechanical and Environmental
- Operating temperature:
- Commercial: 0°C to +55°C
- Optional: -40°C to +85°C
- Non-operating: -55°C to +95°C
- Airflow requirement: 0.5CFM
- Humidity: 5% to 90% (non-cond.)
- Altitude: 0 to 10,000 ft
- Power:
- +5Volts: 55mA
- +3.3Volts: 72mA
- +12Volts: 500mA
- Vibration: 0.5G RMS, 20-2000Hz random
- Shock: 20G, 11ms, 1/2 sine
- Weight: 3 oz
- Size: XMC single-width (74mm x 149mm)
- Front panel I/O
- XMC-SoftDAC-xxF: XX Channels with Memory DAC, output buffers, 2 microsecond
-08: 8 Channels-16: 16 Channels-32: 32 Channels
- XMC-SoftDAC-xxF-I: Same as above with -40ºC to +85ºC
*Commercial Temp: 0 °C to +70 °C (From Image)- XMC-16AD16-200: 16 Channels 16 Bits, 200KSP
- XMC-32AD16-200: 32 Channels 16 Bits, 200KSP
Ext Temp: -40 °C to +85 °C (From Image) - XMC-16AD16-200-1: 16 Channels 16 Bits, 200KSP
- XMC-32AD16-200-1: 32 Channels 16 Bits, 200KSP
Optional Accessories:
- Part Number : TB-68-SCSI 68 pin terminal block and 1 meter SCSI cable
- CBL-68-SCSI 68 pin, 1 meter SCSI cable
- Form Factor: XMC single-width (74mm x 149mm)
- DACs: Software Programmable 2µs DACs, up to 32 channels, 16-bit resolution
- Settling Time: 2µS settling time, 0-5V range
- Output Drive: Up to 30mA output drive
- Memory: 1M words x 32 bits dynamically allocatable among channels
- Throughput: 500K samples/second throughput
- Digital I/O: 4-user digital I/O (TTL levels, outputs: 48mA sinking, 12mA sourcing)
- Optional Feature: Optional A/D for reading back
| Mechanical Interface | Switched Mezzanine Card (XMC) Interface confirming to ANSI/VITA 42.0-2008 (Auxiliary Standard) Standard single-width (149mm x 74mm) | |||||||||
| Electrical Interface | PCI Express x4 Link (Base Specification 2.1) compliant interface conforming to ANSI/VITA 42.3-2006 (PCI Express Protocol Layer Standard) | |||||||||
| PCI Express Switch | PI7C9X2G312GP (Pericom) | |||||||||
| PCI Express to PCI Bridge | XIO2001 (Texas Instruments) | |||||||||
| User configurable FPGA | TXMC639-10R: XC7K160T-2FBG676I (AMD) TXMC639-11R: XC7K325T-2FBG676I (AMD) | |||||||||
| SPI-Flash | MT25QL128 (Micron) 128 Mbit (contains TXMC639 FPGA BRD) or compatible; +3.3 V supply voltage | |||||||||
| DDR3 RAM | 2x MT41K256M16TW-107 (Micron) 256Meg x 32 bit | |||||||||
| Board Configuration Controller | LCMXO2-7000HC (Lattice) | |||||||||
| ADC | LTC2320 -16 (Analog Devices) | |||||||||
| DAC | AD5547BRUZ (Analog Devices) | |||||||||
| A/D Channels | TXMC639-10R: 8 Differential 16bit A/D Channels TXMC639-11R: 16 Differential 16bit A/D Channels Input Configuration per BCC Device: Input Voltage Ranges: Differental : ±20.57 V, ±10.28 V or ±5.14 V (Single-Ended: ±10.28 V, ±5.14 V or ±2.57 V) All analog inputs are connected via an impedance converter and a second operation amplifier for level adjustment and filtering to the differential ADC inputs. The -3 dB limit of this input stage is at approx. 8MHz | |||||||||
| D/A Channels | TXMC639-10R: 4 Single-Ended 16 Bit D/A Channels TXMC639-11R: 8 Single-Ended 16 Bit D/A Channels Output range configurable per D/A channel. Maximum single-ended Output Voltage – Vout: ±10 V Maximum Output Drive Current for each Output: 10 mA Maximum Capacitive Load for each Output: 1000 pF Typical Settling Time for a 10 mA / 1000 pF: < 1 µs | |||||||||
| Digital Front I/O Channels | 32 digital I/O Lines
| |||||||||
| Digital Rear I/O Channels | 64 direct FPGA I/O lines to P14 Rear I/O connector
4 MGT line to P16 Rear I/O connector
| |||||||||
| Front I/O | Front I/O Samtec – ERF8_050_01_L_D_RA_L_TR | |||||||||
| P14 Rear I/O | 64 pin Mezzanine Connector (Molex 71436-2864 or compatible) | |||||||||
| P16 Rear I/O | 114 pin Mezzanine Connector (Samtec – ASP-105885-01) | |||||||||
| Power Requirements 1) | Depends on FPGA design With TXMC639 Board Reference Design / without external load
| |||||||||
| Temperature Range | Operating: – 40 °C to + 85 °C Storage: – 55 °C to + 125 °C | |||||||||
| MTBF 1) | 157 000 h to 161 000 h | |||||||||
| Humidity | 5% – 95% non-condensing | |||||||||
| Weight | 140 g |
1) depends on variant, for further details see User Manual
TXMC639-10R
| 8x Analog In, 4x Analog Out, XC7K160T-2FBG676 Kintex™ 7 FPGA AMD Kintex™ 7 FPGA (XC7K160T-2FBG676), 1GB DDR3, 8x Analog In, 4x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O |
TXMC639-11R
| 16x Analog In, 8x Analog Out, XC7K325T-2FBG676 Kintex™ 7 FPGA AMD Kintex™ 7 FPGA (XC7K325T-2FBG676), 1GB DDR3, 16x Analog In, 8x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O |
SOFTWARE
Share this product
LinkedIn
