- Slave 4 industry pack carrier
- PCI Express x1 Lane
- PCIe Specification, r1.0a
- Full Size format factor
- DMA engines support, to offload from local processors the overhead tasks involved in moving data from one side of the bridge to the other
- Support for up to Four IP modules
- 8 MHz or 32 MHz IP operation Software programmable
- Supports double-wide form factor Industry Pack
- Full interrupt support of host
- Front panel IDC I/O
PCIe-4SIP
PCIe Slave 4 Industry Pack Carrier With 4 IDC Connector
- Slave 4 industry pack carrier
- PCI Express x1 Lane
- PCIe Specification, r1.0a
- Full Size format factor
- DMA engines support, to offload from local processors the overhead tasks involved in moving data from one side of the bridge to the other
- Support for up to Four IP modules
- 8 MHz or 32 MHz IP operation Software programmable
- Supports double-wide form factor Industry Pack
- Full interrupt support of host
- Front panel IDC I/O
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PCIe-4SIP
PCIe Slave 4 Industry Pack Carrier With 4 IDC Connector
The PCIe-4SIP is a PCIexpress bus Full Size form factor IP carrier. The PCIe-4SIP provides mechanical support and the electrical interfaces for Four single width IP modules. Multiple PCIe-4SIP boards may be installed in a single system.
Available Software Drivers:
-
- Labview
- Linux
- Window XP
- QNX
- VxWorks
Applications:
- For application requiring low cost, high density I/O or unique I/O combinations, the PCIe-4SIP is the perfect solution.
Industry Pack Specifications:
-
- Meets ANSI/VITA 4-1995
- 8/32 MHz synchronous operation
- Supports ID, 128 byte I/O, interrupt, & 8 Mbyte memory spaces
- 2 Interrupts per module
- Two passive DMA channels are possible
- Hardware self-timed per IP module
- Triggered via system reset and software control
- Software time-out function
- 5, +/-12 volt resettable fuse per IP
- 8/16 bit data
PCIe Bus Features:
-
- Compliant PCIe Specification, r1.0a
- PCIMG 1.x
- Multiple DMA operational modes
- Direct master data transfers
- Direct slave data transfers
IP Interface Features:
-
- 4 x 50 pins IDC Connector on Front Panel
Operating Environment:
-
- Operating temperature Commercial: 0 to +70 ºC
- Industrial: -40 to +85 ºC
- Non-operating: -45 ºC to +125 ºC
- Airflow requirement – 5 CFM
- Humidity – 5 to 90% (non-cond)
- Altitude – 0 to 10,000 feet
Mechanical: Environmental:
-
- Size – PCIe module full form factor 111mm x 170mm
- Power – 1.5 watt
- Front panel I/O and optional back panel connectors
- Vibration – 0.5G, 20-2000 Hz rand
- Shock – 20G, 11 msec, ½ sine
- Weight – tbd
- MTBF – >250,000 hours
- Power:
- +3.3 Volts (±10%): <=Tbd
- +5 Volts (±5%):<= Tbd
- ±12 Volts provided to each IP module
Ordering Information:
Commercial: 0 to +70 ºC PCIe-4SIP
-
- PCIe-4SIP
4 Slot Industry Pack PCIe Slave Carrier
- PCIe-4SIP
Industrial: -40to +85 ºC
Same as the above with –I
-
- PCIe-4SIP-I
4 Slot Industry Pack PCIe Slave Carrier
- PCIe-4SIP-I
Optional Accessories:
-
- CBL-50-HDR
50 pin header cable- IDC Header to IDC Header Connector - TB-50-HDR
Terminal block
- CBL-50-HDR
Data Sheet – Link Here
- Slave 4 industry pack carrier
- PCI Express x1 Lane
- PCIe Specification, r1.0a
- Full Size format factor
- DMA engines support, to offload from local processors the overhead tasks involved in moving data from one side of the bridge to the other
- Support for up to Four IP modules
- 8 MHz or 32 MHz IP operation Software programmable
- Supports double-wide form factor Industry Pack
- Full interrupt support of host
- Front panel IDC I/O
| Mechanical Interface | Switched Mezzanine Card (XMC) Interface confirming to ANSI/VITA 42.0-2008 (Auxiliary Standard) Standard single-width (149mm x 74mm) | |||||||||
| Electrical Interface | PCI Express x4 Link (Base Specification 2.1) compliant interface conforming to ANSI/VITA 42.3-2006 (PCI Express Protocol Layer Standard) | |||||||||
| PCI Express Switch | PI7C9X2G312GP (Pericom) | |||||||||
| PCI Express to PCI Bridge | XIO2001 (Texas Instruments) | |||||||||
| User configurable FPGA | TXMC639-10R: XC7K160T-2FBG676I (AMD) TXMC639-11R: XC7K325T-2FBG676I (AMD) | |||||||||
| SPI-Flash | MT25QL128 (Micron) 128 Mbit (contains TXMC639 FPGA BRD) or compatible; +3.3 V supply voltage | |||||||||
| DDR3 RAM | 2x MT41K256M16TW-107 (Micron) 256Meg x 32 bit | |||||||||
| Board Configuration Controller | LCMXO2-7000HC (Lattice) | |||||||||
| ADC | LTC2320 -16 (Analog Devices) | |||||||||
| DAC | AD5547BRUZ (Analog Devices) | |||||||||
| A/D Channels | TXMC639-10R: 8 Differential 16bit A/D Channels TXMC639-11R: 16 Differential 16bit A/D Channels Input Configuration per BCC Device: Input Voltage Ranges: Differental : ±20.57 V, ±10.28 V or ±5.14 V (Single-Ended: ±10.28 V, ±5.14 V or ±2.57 V) All analog inputs are connected via an impedance converter and a second operation amplifier for level adjustment and filtering to the differential ADC inputs. The -3 dB limit of this input stage is at approx. 8MHz | |||||||||
| D/A Channels | TXMC639-10R: 4 Single-Ended 16 Bit D/A Channels TXMC639-11R: 8 Single-Ended 16 Bit D/A Channels Output range configurable per D/A channel. Maximum single-ended Output Voltage – Vout: ±10 V Maximum Output Drive Current for each Output: 10 mA Maximum Capacitive Load for each Output: 1000 pF Typical Settling Time for a 10 mA / 1000 pF: < 1 µs | |||||||||
| Digital Front I/O Channels | 32 digital I/O Lines
| |||||||||
| Digital Rear I/O Channels | 64 direct FPGA I/O lines to P14 Rear I/O connector
4 MGT line to P16 Rear I/O connector
| |||||||||
| Front I/O | Front I/O Samtec – ERF8_050_01_L_D_RA_L_TR | |||||||||
| P14 Rear I/O | 64 pin Mezzanine Connector (Molex 71436-2864 or compatible) | |||||||||
| P16 Rear I/O | 114 pin Mezzanine Connector (Samtec – ASP-105885-01) | |||||||||
| Power Requirements 1) | Depends on FPGA design With TXMC639 Board Reference Design / without external load
| |||||||||
| Temperature Range | Operating: – 40 °C to + 85 °C Storage: – 55 °C to + 125 °C | |||||||||
| MTBF 1) | 157 000 h to 161 000 h | |||||||||
| Humidity | 5% – 95% non-condensing | |||||||||
| Weight | 140 g |
1) depends on variant, for further details see User Manual
TXMC639-10R
| 8x Analog In, 4x Analog Out, XC7K160T-2FBG676 Kintex™ 7 FPGA AMD Kintex™ 7 FPGA (XC7K160T-2FBG676), 1GB DDR3, 8x Analog In, 4x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O |
TXMC639-11R
| 16x Analog In, 8x Analog Out, XC7K325T-2FBG676 Kintex™ 7 FPGA AMD Kintex™ 7 FPGA (XC7K325T-2FBG676), 1GB DDR3, 16x Analog In, 8x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O |
SOFTWARE
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