- Form Factor: 3U PXIe form factor
- Interface: PXI Express x1 lane, PCIe Gen-1 capable
- FPGA: User-programmable Altera Cyclone IV FPGA (EP4CE30, 682 pins)
- Memory: 64MB dual-ported DDR memory
- RS-485 Interface: 20Mbps RS-485 with logic-selectable 120Ω termination resistor
- I/O Operations: Supports up to 80 RS-422/485 or 160 LVTTL sources, or a combination of both
- Software-Selectable Features: Half or Full Duplex operation
- JTAG Connector: On-board XMC JTAG connector
- FPGA I/O Bank Control: To PXI interface, including Trigger and Clock
PXIe-CIV-PIO-160
PXIexpress User-Configurable Altera Cyclone IV 64MB Dual Ported DDR Up to 80 RS-422/485 or 160 LVTTL or Combination I/O Sources
- Form Factor: 3U PXIe form factor
- Interface: PXI Express x1 lane, PCIe Gen-1 capable
- FPGA: User-programmable Altera Cyclone IV FPGA (EP4CE30, 682 pins)
- Memory: 64MB dual-ported DDR memory
- RS-485 Interface: 20Mbps RS-485 with logic-selectable 120Ω termination resistor
- I/O Operations: Supports up to 80 RS-422/485 or 160 LVTTL sources, or a combination of both
- Software-Selectable Features: Half or Full Duplex operation
- JTAG Connector: On-board XMC JTAG connector
- FPGA I/O Bank Control: To PXI interface, including Trigger and Clock
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PXIe-CIV-PIO-160
PXIexpress User-Configurable Altera Cyclone IV 64MB Dual Ported DDR Up to 80 RS-422/485 or 160 LVTTL or Combination I/O Sources
The PXIe-CIV-PIO-160 is a 3U PXI Express board designed for versatile I/O operations. It can handle up to 80 RS-422/485 or 160 LVTTL sources, or a combination of both. The board features a user-programmable Altera Cyclone IV FPGA and 64MB of dual-ported DDR memory, providing users with complete control over I/O operations on all sources. RS-485 throughput is 20 Mbps on all channels, with software-selectable half or full duplex operation. The operating temperature range is -40°C to +85°C, making it suitable for a variety of environments.
Input/Output Specifications
- Four VHDCI 68-pin front panel connectors
- Supports up to 80 pairs of RS-422/485 or 160 LVTTL lines, or a combination of both
- 120Ω logic selectable termination resistor
- High input impedance supports up to 256 nodes
- Software-selectable half or full duplex operation
- Enhanced ESD protection to ±15KV
Memory
- 64MB external DDR memory
- Dual-ported between the Altera FPGA and PCIe bus with arbitration
Cyclone IV FPGA Programmability
- Programmable via Bit/Byte Blaster
- Programmable via Serial EPROM
- Programmable via JTAG
- Programmable via PXIe bus
PCIe Interface
- 8/32MHz clock
- 16-bit address
- Supports interrupts
Operating Environment
- Operating temperature: Industrial -40°C to +85°C
- Non-operating temperature: -50°C to +90°C
- Airflow requirement: 0.5 CFM
- Humidity: 5 to 90% (non-condensing)
- Altitude: Up to 10,000 feet
Available Software Drivers
- Linux drivers
- Windows drivers
Mechanical Specifications
- Size: 3U PCI Express module, 5.25” x 13.8” (13.3cm x 34.9cm)
- Power consumption: Maximum of 2.0W
- Vibration resistance: 0.5G, 20-2000 Hz random
- Shock resistance: 20G, 11 ms, ½ sine
- Weight: 4 oz
- MTBF: >250,000 hours
Part Number: PXIe-CIV-PIO-160
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- PXI Express Altera Cyclone IV I/O, 160 sources
- Form Factor: 3U PXIe form factor
- Interface: PXI Express x1 lane, PCIe Gen-1 capable
- FPGA: User-programmable Altera Cyclone IV FPGA (EP4CE30, 682 pins)
- Memory: 64MB dual-ported DDR memory
- RS-485 Interface: 20Mbps RS-485 with logic-selectable 120Ω termination resistor
- I/O Operations: Supports up to 80 RS-422/485 or 160 LVTTL sources, or a combination of both
- Software-Selectable Features: Half or Full Duplex operation
- JTAG Connector: On-board XMC JTAG connector
- FPGA I/O Bank Control: To PXI interface, including Trigger and Clock
| Mechanical Interface | Switched Mezzanine Card (XMC) Interface confirming to ANSI/VITA 42.0-2008 (Auxiliary Standard) Standard single-width (149mm x 74mm) | |||||||||
| Electrical Interface | PCI Express x4 Link (Base Specification 2.1) compliant interface conforming to ANSI/VITA 42.3-2006 (PCI Express Protocol Layer Standard) | |||||||||
| PCI Express Switch | PI7C9X2G312GP (Pericom) | |||||||||
| PCI Express to PCI Bridge | XIO2001 (Texas Instruments) | |||||||||
| User configurable FPGA | TXMC639-10R: XC7K160T-2FBG676I (AMD) TXMC639-11R: XC7K325T-2FBG676I (AMD) | |||||||||
| SPI-Flash | MT25QL128 (Micron) 128 Mbit (contains TXMC639 FPGA BRD) or compatible; +3.3 V supply voltage | |||||||||
| DDR3 RAM | 2x MT41K256M16TW-107 (Micron) 256Meg x 32 bit | |||||||||
| Board Configuration Controller | LCMXO2-7000HC (Lattice) | |||||||||
| ADC | LTC2320 -16 (Analog Devices) | |||||||||
| DAC | AD5547BRUZ (Analog Devices) | |||||||||
| A/D Channels | TXMC639-10R: 8 Differential 16bit A/D Channels TXMC639-11R: 16 Differential 16bit A/D Channels Input Configuration per BCC Device: Input Voltage Ranges: Differental : ±20.57 V, ±10.28 V or ±5.14 V (Single-Ended: ±10.28 V, ±5.14 V or ±2.57 V) All analog inputs are connected via an impedance converter and a second operation amplifier for level adjustment and filtering to the differential ADC inputs. The -3 dB limit of this input stage is at approx. 8MHz | |||||||||
| D/A Channels | TXMC639-10R: 4 Single-Ended 16 Bit D/A Channels TXMC639-11R: 8 Single-Ended 16 Bit D/A Channels Output range configurable per D/A channel. Maximum single-ended Output Voltage – Vout: ±10 V Maximum Output Drive Current for each Output: 10 mA Maximum Capacitive Load for each Output: 1000 pF Typical Settling Time for a 10 mA / 1000 pF: < 1 µs | |||||||||
| Digital Front I/O Channels | 32 digital I/O Lines
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| Digital Rear I/O Channels | 64 direct FPGA I/O lines to P14 Rear I/O connector
4 MGT line to P16 Rear I/O connector
| |||||||||
| Front I/O | Front I/O Samtec – ERF8_050_01_L_D_RA_L_TR | |||||||||
| P14 Rear I/O | 64 pin Mezzanine Connector (Molex 71436-2864 or compatible) | |||||||||
| P16 Rear I/O | 114 pin Mezzanine Connector (Samtec – ASP-105885-01) | |||||||||
| Power Requirements 1) | Depends on FPGA design With TXMC639 Board Reference Design / without external load
| |||||||||
| Temperature Range | Operating: – 40 °C to + 85 °C Storage: – 55 °C to + 125 °C | |||||||||
| MTBF 1) | 157 000 h to 161 000 h | |||||||||
| Humidity | 5% – 95% non-condensing | |||||||||
| Weight | 140 g |
1) depends on variant, for further details see User Manual
TXMC639-10R
| 8x Analog In, 4x Analog Out, XC7K160T-2FBG676 Kintex™ 7 FPGA AMD Kintex™ 7 FPGA (XC7K160T-2FBG676), 1GB DDR3, 8x Analog In, 4x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O |
TXMC639-11R
| 16x Analog In, 8x Analog Out, XC7K325T-2FBG676 Kintex™ 7 FPGA AMD Kintex™ 7 FPGA (XC7K325T-2FBG676), 1GB DDR3, 16x Analog In, 8x Analog Out, 32x digital Front I/O, 64x direct FPGA Rear I/O Lines and 4x MGTs Rear I/O |
SOFTWARE
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