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	<title>PCIe x 4 &#8211; ALPHI Technology</title>
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		<title>PCIe-4QMC</title>
		<link>https://www.alphitech.com/products/home-featured/pcie-4qmc/</link>
		
		<dc:creator><![CDATA[Ryan]]></dc:creator>
		<pubDate>Tue, 11 Nov 2025 00:39:09 +0000</pubDate>
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					<description><![CDATA[PCIe-4QMC Carrier — Four VITA 93 QMC Sites]]></description>
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<li>Supports up to four (4) single-width VITA© 93 QMC modules</li>
<li>PCIe Gen3 x8 host interface (Gen2 fallback compatible)</li>
<li>Backward compatible with PCIe r1.0a / 1.1 / 2.0 / 3.0</li>
<li>Provides up to PCIe Gen2 x4 lanes per QMC site</li>
<li>Each QMC slot (Slot 1 – Slot 4) provides a Px2 I/O interface, supporting up to 40 single-ended or 20 differential pairs per slot</li>
<li>VITA 93 dual-connector topology per site for Host and I/O</li>
<li>Front-panel I/O via high-density connectors</li>
<li>Per-site fused power protection</li>
<li>Full-height, half-length PCIe form factor 111.15 mm (4.376 in) x 167.65 mm (6.6 in)</li>
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		<title>PCIe-1553-4</title>
		<link>https://www.alphitech.com/products/pcie/pcie-1553-4/</link>
		
		<dc:creator><![CDATA[Ryan]]></dc:creator>
		<pubDate>Tue, 18 Mar 2025 02:32:02 +0000</pubDate>
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					<description><![CDATA[QUAD UTMC 1553 SUMMIT CONTROLLER]]></description>
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<li>1 to 4 UTMC SUMMIT</li>
<li>UT69151DX-GPC</li>
<li>BC / RT / BM</li>
<li>On-chip Transceivers</li>
<li>On-board Transformers</li>
<li>Long stub / Short stub</li>
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		<title>M.2-XCAU7P-FPGA</title>
		<link>https://www.alphitech.com/products/m-dot-2/m-2-xcau7p-fpga/</link>
		
		<dc:creator><![CDATA[Ryan]]></dc:creator>
		<pubDate>Mon, 10 Feb 2025 09:55:58 +0000</pubDate>
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					<description><![CDATA[M.2 PCIe x4 USER RECONFIGURABLE AMD-XILINX ARTIX ULTRASCALE+ FPGA 16 Channels RS-422/485 OR 32 Channels LVTTL]]></description>
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<li>M.2 PCI Express x4 lane interface</li>
<li>M.2 2260 support Key M &amp; B</li>
<li>User-reconfigurable AMD-Xilinx Artix UltraScale+ FPGA</li>
<li>Up to 16 Pairs RS-422/485 bidirectional channels, 20Mb/s data rate per channel, software-selectable half or full duplex, or up to 32 Channels LVTTL</li>
<li>Software-selectable 120Ω termination</li>
<li>Software-programmable interrupts for Change-of-State/Level detection</li>
<li>High Precision User Clock PPB Input on Board</li>
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